MXXXXXXX ND NG NS NB MNAME <L=VAL> <W=VAL> <AD=VAL> + <AS=VAL> <PD=VAL> <PS=VAL> <NRD=VAL> <NRS=VAL> + <OFF> <IC=VDS,VGS,VBS>
Examples:
M1 24 2 0 20 TYPE1 M31 2 17 6 10 MODM L=5U W=2U M1 2 9 3 0 MOD1 L=10U W=5U AD=100P AS=100P + PD=40U PS=40U
ND, NG, NS, and NB are the drain, gate, source, and bulk (substrate) nodes, respectively. MNAME is the model name. L and W are the channel length and width, in meters. AD and AS are the areas of the drain and source diffusions, in sq-meters. Suffix U specifies microns (1E-6 m); suffix P specifies sq-microns (1E-12 sq-m). If L, W, AD, and AS are not specified, default values are used.
The use of defaults simplifies input file preparation, as well as the editing required if device geometries are to be changed. PD and PS are the perimeters of the drain and source junctions, in meters. NRD and NRS designate the equivalent number of squares of the drain and source diffusions; these values multiply the sheet resistance RSH specified on the .MODEL statement for an accurate representation of the parasitic series drain and source resistance of each transistor. PD and PS default to 0.0 while NRD and NRS to 1.0. OFF indicates an (optional) initial condition on the device for DC analysis. The (optional) initial condition specification using IC=VDS,VGS,VBS is intended for use with the UIC option on the .TRAN statement, when a transient analysis is desired starting from other than the quiescent operating point.
See the .IC statement for a better and more convenient way to specify transient initial conditions.
MOSFET Models (both N and P channel)
DR. SPICE provides four MOSFET device models, which differ in the formulation of the I-V characteristic.
(A. Vladimirescu and S. Liu, The Simulation of MOS Integrated Circuits Using SPICE2, ERL Memo No. ERL M80/7, Electronics Research Laboratory, University of California, Berkeley, Oct. 1980.)
(B. J. Sheu, D. L. Scharfetter, and P. K. Ko, SPICE2 Implementation of BSIM, ERL Memo No. ERL M85/42, Electronics Research Laboratory, University of California, Berkeley, May 1989.)
MOS1 works well for board-level circuit design and simple integrated circuits. MOS2, MOS3, and MOS4 include second-order effects such as channel length modulation, subthreshold conduction, scattering limited velocity saturation, small-size effects, and charge-controlled capacitances. MOS2,3, and 4 are most useful for designing advanced integrated circuits.
MOSFET Model Parameters
MOSFET model parameters are presented in two tables: the first table lists the parameters and defaults for levels 1, 2, and 3; the second table lists the parameters and defaults for level 4.
The LEVEL variable specifies the MOSFET model to be used:
The DC characteristics of the level 1 through level 3 MOSFETs are defined by the device parameters VTO, KP, LAMBDA, PHI and GAMMA. These parameters are computed by DR. SPICE if process parameters (NSUB, TOX, ...) are given, but user-specified values always override. VTO is positive (negative) for enhancement mode and negative (positive) for depletion mode N-channel (P-channel) devices.
Charge storage is modeled by three constant capacitors, CGSO, CGDO, and CGBO which represent overlap capacitances, by the non-linear thin-oxide capacitance which is distributed among the gate, source, drain, and bulk regions, and by the non-linear depletion-layer capacitances for both substrate junctions divided into bottom and periphery, which vary as the MJ and MJSW power of junction voltage respectively, and are determined by the parameters CBD, CBS, CJ, CJSW, MJ, MJSW and PB.
Charge storage effects are modeled by the piece-wise linear voltage-dependent capacitance model proposed by Meyer. The thin-oxide charge storage effects are treated slightly different for the LEVEL=1 model. These voltage-dependent capacitances are included only if TOX is specified in the input description and they are represented using Meyers formulation.
There is some overlap among the parameters describing the junctions, e.g. the reverse current can be input either as IS (in A) or as JS (in A/m2). Whereas the first is an absolute value, the second is multiplied by AD and AS to give the reverse current of the drain and source junctions, respectively.
This methodology has been chosen since there is no sense in relating always junction characteristics with AD and AS entered on the device statement; the areas can be defaulted. The same idea applies also to the zero-bias junction capacitances CBD and CBS (in F) on one hand, and CJ (in F/m2) on the other.
The parasitic drain and source series resistance can be expressed as either RD and RS (in ohms) or RSH (in ohms/sq.); the latter is multiplied by the number of squares NRD and NRS input on the device statement.
In the table of level 4 model parameters, the parameters marked with an * in the l/w column have a dependency on length and width. For example, VFB is the basic parameter with units of volts; LVFB and WVFB parameters also exist, with units of volts/micron.
The following formula is used to evaluate the parameter for the actual device specified:
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NOTE: Like the other models in DR. SPICE, the BSIM model is designed for use with a process characterization system that provides all the parameters, thus there are no defaults for the parameters. Leaving out a parameter is considered an error. For an example set of parameters and the format of a process file, see the SPICE2 implementation notes of B.J. Sheu, et al.
MOSFET Model Parameters: Levels 1, 2, and 3
Name Meaning Units Default
AF flicker noise exponent - 1.0
CBD zero-bias B-D junction capacitance F 0.0
CBS zero-bias B-S junction capacitance F 0.0
CGBO gate-bulk overlap capacitance F/m 0.0
CGDO gate-drain overlap cap per meter channel width F/m 0.0
CGSO gate-source overlap cap per meter channel widthF/m 0.0
CJ zero-bias bulk junction bottom cap. per F/m2 0.0
junction area
CJSW zero-bias bulk junction sidewall cap. per F/m 0.0
junction perimeter
DELTA width effect on threshold voltage (MOS2 and - 0.0
MOS3)
ETA static feedback (MOS3 only) - 0.0
FC coefficient for forward-bias depletion - 0.5
capacitance formula
GAMMA bulk threshold parameter V1/2 0.0
IS bulk junction saturation current A 1.0E-14
JS bulk junction saturation current per junction A/m2 1.0E-8
area
JSSW bulk junction saturation sidewall A/m 0.0
current/length
KAPPA saturation field factor (MOS3 only) - 0.2
KF flicker noise coefficient - 0.0
KP transconductance parameter A/V2 2.0E-5
L channel length meter DEFL
LAMBDA channel-length modulation (MOS1 and MOS2 only) 1/V 0.0
LD lateral diffusion (length) meter 0.0
LEVEL model index - 1
MJ bulk junction bottom grading coefficient - 0.5
MJSW bulk junction sidewall grading coeff. - 0.50
0.33
N bulk junction emission coefficient 1
NEFF total channel charge (fixed and mobile) coeff - 1.0
(MOS2 only)
NFS fast surface state density 1/cm2 0.0
NSS surface state density 1/cm2 0.0
NSUB substrate doping 1/cm2 0.0
OX oxide thickness meter 1.0E-7
PB bulk junction potential V 0.8
PBSW bulk junction sidewall potential V PB
PHI surface potential V 0.6
RB bulk ohmic resistance W 0.0
RD drain ohmic resistance W 0.0
RDS drain-source shunt resistance W infinite
RG gate ohmic resistance W 0.0
RS source ohmic resistance W 0.0
RSH drain and source diffusion sheet resistance W/sq. 0.0
THETA mobility modulation (MOS3 only) 1/V 0.0
TPG type of gate material: - 1.0
+1 opp. to substrate
-1 same as substrate
0 Al gate
TT bulk junction transit time s 0.0
UCRIT critical field for mobility degradation (MOS2 V/cm 1.0E4
only)
UEXP critical field exponent in mobility degradation - 0.0
(MOS2 only)
UO surface mobility cm2/V-s 600
UTRA transverse field coeff (mobility) (deleted for - 0.0
MOS2)
VMAX maximum drift velocity of carriers m/s 0.0
VTO zero-bias threshold voltage V 0.0
W channel width meter DEFW
WD lateral diffusion (width) meter 0.0
XJ metallurgical junction depth meter 0.0
XQC fraction of channel charge attributed to drain 1.0
MOSFET Model Parameters: Level 4
Name Meaning Units Default L/W
AF flicker noise exponent - 1.0
CBD zero-bias B-D junction capacitance F 0.0
CBS zero-bias B-S junction capacitance F 0.0
CGBO G-B overlap capacitance per meter channel lengthF/m
CGDO G-D overlap capacitance per meter channel width F/m
CGSO G-S overlap capacitance per meter channel width F/m
CJ source drain junction capacitance per unit area F/m2
CJSW S-D junction sidewall capacitance per unit F/m
length
DELL source drain junction length reduction m
DL shortening of channel µm
DW narrowing of channel µm
ETA zero-bias drain-induced barrier lowering coeff - *
FC coeff for forward-bias depletion capacitance - 0.5
IS bulk junction saturation current A 1.0E-14
JS source drain junction current density A/m2
JSSW bulk junction saturation sidewall current/lengthA/m 0.0
K1 body effect coefficient V1/2 *
K2 drain/source depletion charge sharing - *
coefficient
KF flicker noise coefficient - 0.0
L channel length meter DEFL
LEVEL model index - 1
MJ grading coefficient of source drain junction -
MJSW grading coeff of source drain junction sidewall -
MUS mobility at zero substrate bias and at Vds = Vddcm2/V-s *
MUZ zero-bias mobility cm2/V-s *
N bulk junction emission coefficient 1
N0 zero-bias subthreshold slope coefficient - *
NB sens. of subthreshold slope to substrate bias - *
ND sens. of subthreshold slope to drain bias - *
PB built in potential of source drain junction V
PBSW built in potential of source, drain junction V
sidewall
PHI surface inversion potential V *
RB bulk ohmic resistance W 0.0
RD drain ohmic resistance W 0.0
RDS drain-source shunt resistance W infinite
RG gate ohmic resistance W 0.0
RS source ohmic resistance W 0.0
RSH drain and source diffusion sheet resistance W/square
TEMP temperature at which parameters were measured °C
TOX gate oxide thickness µm
TT bulk junction transit time s 0.0
U0 zero-bias transverse-field mobility degradation V-1 *
coeff
U1 zero-bias velocity saturation coefficient µm/V *
VDD measurement bias range V
VFB flat-band voltage V *
W channel width meter DEFW
WDF source drain junction default width m
X2E sens. of D-induced barrier lowering to substr V-1 *
bias
X2MS sens. of mobility to substrate bias at Vds = Vddcm2/V-s *
X2MZ sens. of mobility to substrate bias at Vds = 0 cm2/V-s *
X2U0 sens. of transverse field mobility degradation V-2 *
to Vb
X2U1 sens. of velocity saturation effect to substrate µmV-2 *
bias
X3E sens. of D-induced barrier lowering to Vd at V-1 *
Vds=Vdd
X3MS sens. of mobility to drain bias at Vds = Vdd cm2/V-s *
X3U1 sens. of velocity sat. effect on Vd at Vds=Vdd µmV-2 *
XPART gate-oxide capacitance charge model flag -
* The parameter has a dependency on length and width. **XPART = 0 selects a 40/60 drain/source charge partition in saturation; XPART=1 selects a 0/100 drain/source charge partition.